the test is on 32-bit x86
. I compiled the code with gcc 4.2
, optimization level o2
. I compiled the C code into binary, and then use objdump
to disassemble it.
Here are two sequences of instructions used for the function prologue:
0804a6f0 <quotearg_n>:
804a6f0: 8b 44 24 04 mov 0x4(%esp),%eax
804a6f4: b9 ff ff ff ff mov $0xffffffff,%ecx
804a6f9: 8b 54 24 08 mov 0x8(%esp),%edx
804a6fd: c7 44 24 04 40 e1 04 movl $0x804e140,0x4(%esp)
804a704: 08
804a705: e9 c6 fa ff ff jmp 804a1d0 <quotearg_n_options>
804a70a: 8d b6 00 00 00 00 lea 0x0(%esi),%esi
0804a730 <quotearg>:
804a730: 83 ec 1c sub $0x1c,%esp
804a733: 8b 44 24 20 mov 0x20(%esp),%eax
804a737: c7 04 24 00 00 00 00 movl $0x0,(%esp)
804a73e: 89 44 24 04 mov %eax,0x4(%esp)
804a742: e8 a9 ff ff ff call 804a6f0 <quotearg_n>
804a747: 83 c4 1c add $0x1c,%esp
804a74a: c3 ret
804a74b: 90 nop
804a74c: 8d 74 26 00 lea 0x0(%esi,%eiz,1),%esi
Note that in function quotearg
, register esp
is decreased with 0x1c
before it is used to access the stack and get some arguments. Accutually according to my experience, I think the sub
then access
pattern is quite common for instructions compiled with O2
.
However, note that in function quotearg_n
, register esp
is directly added with 0x4
to access the stack. (I think the meaning of instruction at address 0x804a6f0
is to put the return address of call site to register eax
, am I right..?) According to my observation, the pattern used by the first function is rare, around 5% for gcc
compiled middle size C program with O2
.
So here is my question:
Why does compiler generate function prologue instructions in a way similar to quoterag_n
? What is the exact meaning of the first three instructions start from address 0x804a6f0
?
Why doesn't compiler always generate function prologue instructions following the sub
then access
pattern? (such as quoterag
)
Am I clear? thanks a lot