shubham0d
  • Member for 4 years, 3 months
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My guess is, it's not seeing in lspci output because it's pci express controller. Maybe there is some other way to list or access it.

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At 0:0:0 I have Host bridge- DRAM controller. After that at 0:2:0, I have VGA controller.

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Ok. sure. Thanks for the help.

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Oh right. Never thought about that. That is probably the correct explanation but do you know or point me to some link for why each processor has different GDT?

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