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10 votes

What does adding 4.294967296e9 to a double do?

I actually found the answer while writing this question! This number is exactly UINT_MAX + 1, stored as a double. So it seems this code converts a unsigned integer to a double. The fild instruction ...
tkausl's user avatar
  • 241
9 votes
Accepted

XMM register instructions and their c equivalents

You likely won't get an exact reproduction because cvtdq2pd takes the lower 64 bits of the second operand but since we're limited to 32 bits because we're using eax here, there are probably better(?) ...
Abigail's user avatar
  • 684
6 votes

IDA decompiler macro

COERCE_TYPE(x) is the same thing as *(TYPE *)&x. Hex-Rays uses COERCE_... macros when &x is illegal. For example: COERCE_DOUBLE(__PAIR__(i1,i2)) Is the same as *(double *)&__PAIR__(i1, ...
Ilfak Guilfanov's user avatar
4 votes
Accepted

Moving integer to xmm register

To move a number into an XMM register, you'll first need to move that number into a memory address since you can't move an immediate into an XMM register (meaning, you can't do something like mov XMM1,...
dsasmblr's user avatar
  • 2,234
4 votes
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what is COERCE_FLOAT in ida Hex-Rays' C++ pseudocode?

I assume it's just a simple cast. v29 = *reinterpret_cast< float* >( &v30 ); It would be easier if you'd share the generated assembly instead of the pseudo code.
WasserEsser's user avatar
3 votes
Accepted

(bad) opcodes of objdump

You are correct, and objdump is actually wrong to disassemble such instruction, only to mark it as (bad) in a later stage. Here is how it works: db a5 4e 9c 95 68 lock (bad) [rbp+0x68959c4e] db ...
Jongware's user avatar
  • 2,364
3 votes
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Encoding of 64-bit double

This appears to be a fixed-point (rather than a floating-point) format. If you treat the 64-bit values as signed integers and divide by 4398046511104.0, you will get the decimal values you show. e.g. ...
Ian Cook's user avatar
  • 2,558
2 votes

Encoding method of float

This isn't a complete answer but is a bit more than fits in a comment. There's definitely a pattern in the powers of 2. They all have exactly 4 bits set. The high bit is always 1 and the lower 15 ...
Ian Cook's user avatar
  • 2,558
2 votes

Reverse engineer a blackbox function operating on single or double precision floats for emulation

My starting point here wouldn't be to look at generic emulation approaches as these themselves produce approximations to the function being emulated. (If an approximation is good enough then why not ...
Ian Cook's user avatar
  • 2,558
2 votes
Accepted

determine proprietary 16-bit floating-point format

Maybe it is the temperature in Kelvin: 311 - 80/2 = 217K = -2.15°C Or the offset is different than 80/2. A 16-bit floating-poitn format, especially a different one from IEEE-754 is highly unlikely. ...
ProjectPhysX's user avatar
1 vote

How this Float “4-bytes” is converted to Short_signed “2-bytes”?

One word, precision By definition, a normal is a vector with a length of 1.0f which means that each component of the vector will always fall between -1.0f and +1.0f, and UV are texture coordinates ...
Jerry Hundric's user avatar
1 vote

Weird IDA/Decompiler floating point output

I have added some comments to the disassembly you posted, so it's easier to understand. sub esp, 8 ; stack frame fld [esp+8+arg_0] ; load value of arg0 to st fist [esp+8+var_8] ...
bart1e's user avatar
  • 3,409
1 vote
Accepted

Viewing 32-bit floats in Internal Call disassembly from .NET 2.0 DLL in x64dbg

After a little digging I got it. Right click your Dump to change data types between address and float. You have to follow the address of the address pointed to by esp-4 to get the parameters.
John Ernest's user avatar
1 vote

IDA decompiler macro

coerce_* functions are generally a little more coercive that a simple casting, I would assume their meaning as follows: #define VALUE_SIZE (sizeof(int)) struct VALUE_TYPE { char contents[...
Orwellophile's user avatar
1 vote
Accepted

How to multiply an SSE float with a hardcoded value using MULSS?

Although you indeed cannot use mulss with an immediate value like you've pointed out, you are allowed to pass an 32bit offset as mulss's second operand: Multiplies the low single-precision floating-...
NirIzr's user avatar
  • 11.8k
1 vote
Accepted

Understanding FCOMP instruction and extracted value from address operand

FCOMP Compares the fpu register ST0 with a constant the constant is a QWORD (Meaning DOUBLE , FLOAT , Etc 8+ bytes wide ) ollydbg can show both the ST0 register and decipher the contents of the ...
blabb's user avatar
  • 16.5k
1 vote

Understanding FCOMP instruction and extracted value from address operand

Understanding the assembly line FCOMP QWORD PTR DS:[402CB0] It checks for a qword sized operand. That is 8 bytes while your picture only shows about 3. This comparison is also a floating point ...
NirIzr's user avatar
  • 11.8k

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