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It's some days I'm trying to understand how this protocol works without any success. I need some help.

Basically I'm sniffing an UART signal. 115200 8N1 I understood what's happening under the hood of the protocol. It is based on xor. Here are a couple of examples:

A0 82 00 01 02 14 81 6A 76 
A0 82 00 02 02 14 81 6A 75 

As you can see the 01 to 02 change is reflected to 76 to 75. The data is xor-ed nibble to nibble.

Here's come the problem. The day after I turn on the system and I made another acquisition. Surprise the Checksum change. Apparently also the way the crc is calculated differ because not the bit to change are 2 and 3 of last byte. the data changes from D0 => DC while before it was from 76 to 75.

A0 82 00 01 02 14 81 14 D0 
A0 82 00 02 02 14 81 14 DC 

Actually, I discovered that in the full transmission I have a single message that is changing every time. It is a 5 byte message in the format:

A0 07 0B 40 44
A0 07 EA 1B 58

The 2 messages just posted was taken from the 2 transmission taken before.

I think that the two A0 messages sends some type of CRC feed and some way for calculating it. Second strange thing, I don't understand what kind of CRC is applied in the first message. It looks strange that the message who need to fix a CRCc base seed is non CRC'ed.

Do somebody have some idea on what protocol could be? Something similar?

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