Page 88 of the ARM Cortex-M4 Generic User Guide says "The SBC instruction subtracts the value of Operand2 from the value in Rn. If the carry flag is CLEAR, the result is reduced by one." Why the result is reduced by 1 when the carry flag is CLEAR rather than SET? I think the SBC instruction subtracts the value of the carry flag from the result of subtracting operand2 from Rn, therefore the result is reduced by 1 when the carry flag is SET. Am I wrong?
ARM implements subtraction using addition with the complement of the second argument. Unusually, this implementational detail is exposed in the carry flag behaviour.
The description of the condition flags on page 66 (3-19) of the user guide you link to explains this anomaly -
A carry occurs: • ... • if the result of a subtraction is positive or zero • ...
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