I'm analyzing a Seagate HDD that provides a serial boot console that allows reading/writing bytes to memory and setting an address pointer.

There's a block of memory from 0x0 to 0x20000 and then it repeats all the way to 0x100000. This isn't just a copy - if I write a byte to 0x20000 or 0x40000 the data at location 0x0 also changes. At 0x100000 there's another 128k block that is mirrored over and over until 0x200000. From 0x400000 the first block of memory is mirrored again and again.

Here's a map:

1) 0x000000 - 0x020000
*) (mirrors of block 1)
2) 0x100000 - 0x120000
*) (mirrors of block 2)
3) 0x200000 - 0x300000
4) 0x300000 - 0x400000
*) (mirrors of block 1)

The MCU is some kind of ARM processor. Is this some hardware memory-mapping feature of ARM, is it setup by the OS, or something else?


The block selection logic just looks at the 4 most significant bits of the address, this is easily implemented by a multiplexer whose outputs feed into the enable pin of each memory chip. An 3 bit multiplexer and an OR gate (if active high) is enough to implement this scheme.

The mirroring within a block happens by not connecting the next set of significant bits to the memory chip, (likely because it just doesn't have the address space).

tl;dr it's a hardware memory map based on how the controller and memory chips are connected on the PCB. And it's something that needs a redesign to adjust.

  • It's probably worth mentioning that this is called partial address decoding. – Ian Cook Oct 30 '19 at 18:25

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.