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I cross-compiled a simple program with the aarch-linux-gnu-gcc compiler for ARM. So the machine is "ARM aarch64". I want to understand a single instruction and it's realization in ESIL. The opcode of the instruction is: movk x4, 0x40, lsl 16

The ESIL-string is: -4294901761,x4,&,4194304,|,x4,=

Has anybody an idea, why it looks like that? Shouldn't it be a << to "shift left"?

The R2 commands I run are:

aa
e asm.syntax = att
e asm.emu = true
pdfj

(But i did this in R2pipe)

I am curious about the solution and thank you in advance! :)

|improve this question
  • I think the constant has been calculated for the shift as both shift and value are constants. 0x40<<16 = 4194304 – sudhackar Nov 3 '18 at 3:21
  • @sudhackar dammit, you are right. Thank you for your help. Should have seen that. ^^ But why would a compiler do something like this? Is the parallel loading to a register and shifting faster than parallel loading by itself? – AndiYo Nov 3 '18 at 8:46

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