I tried to disassemble a ELF file which is a shared object file executed on armv7a (Android). I saw a strange block. It seems that the PC
, program counter register, is set to 0
. Did I miss something or do something wrong?
The process goes into 0x1708
in ARM mode. Below is the strange block of asm code I disassembled from the ELF file.
; section: .plt
; function: function_1708 at 0x1708 -- 0x1718
0x1708: 04 e0 2d e5 str lr, [sp, #-4]!
0x170c: 04 e0 9f e5 ldr lr, [pc, #4]
0x1710: 0e e0 8f e0 add lr, pc, lr
0x1714: 08 f0 be e5 ldr pc, [lr, #8]!
; data inside code section at 0x1718 -- 0x171c
0x1718: b4 77 00 00 |.w.. |
After executing line 0x170c
, the LR
register should be set as the value at the address 0x1718
. The value is 0x77b4
(this file is stored in little-endian). And go ahead.
0x1710: lr += 0x1710 + 8 // lr = 0x8ecc
0x1714: pc = *(lr + 8) // pc = *(0x8ed4)
lr += 8
And 0x8ed4 is in .got
section.
; section: .got
0x8eac: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
0x8ebc: 00 00 00 00 58 70 00 00 e0 6e 00 00 00 00 00 00 |....Xp...n......|
0x8ecc: 00 00 00 00 00 00 00 00 00 00 00 00 08 17 00 00 |................|
0x8edc: 08 17 00 00 08 17 00 00 08 17 00 00 08 17 00 00 |................|
0x8eec: 08 17 00 00 08 17 00 00 08 17 00 00 08 17 00 00 |................|
0x8efc: 08 17 00 00 08 17 00 00 08 17 00 00 08 17 00 00 |................|
0x8f0c: 08 17 00 00 08 17 00 00 08 17 00 00 08 17 00 00 |................|
0x8f1c: 08 17 00 00 08 17 00 00 08 17 00 00 08 17 00 00 |................|
0x8f2c: 08 17 00 00 08 17 00 00 08 17 00 00 08 17 00 00 |................|
0x8f3c: 08 17 00 00 08 17 00 00 08 17 00 00 08 17 00 00 |................|
It seems that the value at 0x8ed4
is zero. I traced to this strange block from JNI_OnLoad()
, so no data should be modified before executing this block.
Did I do something wrong, or is this a specific behavior of ARM architecture?