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I saw here http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0489c/CIHDGFEG.html that on arm thumb2 ldr must be multiple of 4.
I run on arm thumb 2 and want run this instruction ldr r0, [pc, #0x13] .
I trunslate in to DFF81300 and that works, even 0x13 is not multiple of 4.
Why is that?
The instruction generated by your assembler for ldr is in fact ldr.w, a 32-bit Thumb 2 instruction, as you can see in the encoding using four bytes. In my experience, ARM assemblers try to be intelligent and figure out the best (or only) working instruction encoding - especially when using unified syntax.
The four byte alignment is only a restriction for ldr instructions encoded as 16 bit instructions (footnote [b] in the document you linked). I suppose this restriction was made due to restricted encoding space for the constant offset in a 16 bit opcode, so the thumb instruction set designers went for a larger possible offset here.
