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According to documentation, the LDRD instruction works, as follows

LDRD    R8, R9, [R3, #0x20];  load r8 from a word 32 bytes above the address in R3, and load r9 from  a word 36 bytes above the address in R3

I understand the first part, R8 loads from a word 32 bytes(0x20) above R3. Its the second part I don't understand. Why is it 36 bytes instead of 32?

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Please referr to the actual instruction manual.

from page A4-50:

LDRD (Load Registers Doubleword) loads a pair of ARM registers from two consecutive words of memory. The pair of registers is restricted to being an even-numbered register and the odd-numbered register that immediately follows it (for example, R10 and R11).

tl/dr: 36 is 32 + 4 (it loads to concecutive words) basically it says at offset 0x20 to r3, get two words for r8 and r9.

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