Working with ASM code, bit I don't understand what does is the difference between these lines?
VLDR S0, [R5]
VLDR S2, [R5,#4]
What is the meaning of #4?
Reverse Engineering Stack Exchange is a question and answer site for researchers and developers who explore the principles of a system through analysis of its structure, function, and operation. It only takes a minute to sign up.
Sign up to join this communityWorking with ASM code, bit I don't understand what does is the difference between these lines?
VLDR S0, [R5]
VLDR S2, [R5,#4]
What is the meaning of #4?
VLDR S0, [R5]
Load single-precision extension register S0
. R5 is the ARM register with the base address for the transfer.
VLDR S2, [R5,#4]
Load single-precision extension register S2
. R5 is the ARM register with the base address for the transfer; however we will be adding the numeric offset (#4
) to the base address R5
to get the address used for the transfer.