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In a recent assignment, I disassembled a binary written in C++.
In a few places throughout the program I came across shift operations by zero bits something like written below (The exact code/IDA isn't in front of me presently). The shift operations were all before a conditional branch.

...
call sub_123456
add esp, 8
shr eax, 0
cmp ...
jz ...

I have a decent understanding of assembly but I can't see why you'd do a bit shift of zero. Isn't this essentially a NOP? I've been looking for info on this but haven't come up with any definitive information. My guess is it's added by the compiler for some reason, though I'd like to understand why. The assignment is already submitted; this is just a question that's been nagging at me. Any input would be appreciated!

Thanks

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    You say that this was some kind of a assignment, so I am almost sure that the asembler code is not optimised (compiled with optimization options), what lead to that assembler instruction. For example the code was i=0;b>>i. – aleek Apr 12 '16 at 17:16
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    Could be a number of things. Eg a 3-byte NOP or an extremely unoptimized eax=eax/1 – Vitaly Osipov Apr 13 '16 at 2:38
  • Thanks for your input guys! Sometimes what compilers do makes very little sense lol – X0r Apr 13 '16 at 13:48
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    Actually this is a logical shr, arithmetic would be sar. And sometimes what we think compilers should do, makes even less sense. Because compilers these days are optimizing for a range of CPUs, for pipelining and so on. I'm with @VitalyOsipov regarding the potential cause, though. – 0xC0000022L Apr 13 '16 at 14:17
  • what about setting the flags (Sign,Zero,Parity) but cmp renders most of them changed. Also could be self-modified code – Spektre Apr 27 '16 at 15:32
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Maybe an optimizing compiler wants the next instruction to start on a 4 byte boundary, e.g. if the next instruction is the destination of a jump in an inner loop. And maybe this one 3-byte instruction is faster than three consecutive one-byte NOPs.

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