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AMD64 (aka x86-64 or x64) registers can be accessed 8, 16, 32 or 64 bits at a time. When reading a disassembly listing, what register operations are not straightforward?
For example, when an instruction accesses part of a register, how does it affect other parts?
What typical instructions or sequences of instructions used by optimizers might encode something that isn't obvious (e.g. xoring a register with itself to set it to zero)?
Not really an optimization, but one gotcha that you must be aware of when coming from x86 is this:
For example, the following:
mov eax, 3
Is actually equivalent to:
mov rax, 3
This also applies to the new registers r8-r15, e.g.:
inc r8d
also zeroes out the top half of r8.
However, the 8-bit and 16-bit portions of registers do not work like that, i.e. operations on them modify only that part of the register.
